Parallel Tiled Code Generation with Loop Permutation within Tiles
Marek Palkowski; West Pomeranian University of Technology ; Wlodzimierz Bielecki; West Pomeranian University of Technology
Computing and Informatics, Tome 36 (2018) no. 6, / Harvested from Computing and Informatics
Text on Computing and Informatics
An approach of generation of tiled code with an arbitrary order of loops within tiles is presented. It is based on the transitive closure of the program dependence graph and derived via a combination of the Polyhedral and Iteration Space Slicing frameworks. The approach is explained by means of a working example. Details of an implementation of the approach in the TRACO compiler are outlined. Increasing tiled program performance due to loop permutation within tiles is illustrated on real-life programs from the NAS Parallel Benchmark suite. An analysis of speed-up and scalability of parallel tiled code with loop permutation is presented.
Publié le : 2018-02-09
Classification:  Parallel and Distributed Computing,  Optimizing compilers, tiling, loop permutation, transitive closure, dependence graph, code locality, automatic parallelization,  68N20, 65Y05, 52Bxx, 97E60, 05-XX 
@article{cai2017_6_1261,
     author = {Marek Palkowski; West Pomeranian University of Technology and Wlodzimierz Bielecki; West Pomeranian University of Technology},
     title = {Parallel Tiled Code Generation with Loop Permutation within Tiles},
     journal = {Computing and Informatics},
     volume = {36},
     number = {6},
     year = {2018},
     language = {en},
     url = {http://dml.mathdoc.fr/item/cai2017_6_1261}
}

Marek Palkowski; West Pomeranian University of Technology; Wlodzimierz Bielecki; West Pomeranian University of Technology. Parallel Tiled Code Generation with Loop Permutation within Tiles. Computing and Informatics, Tome 36 (2018) no. 6, . http://gdmltest.u-ga.fr/item/cai2017_6_1261/