Image processing in industrial vision systems requires both real-time speed and robustness. Modern computers, which fulfill the first demand, are sensitive to hard industrial environment conditions and require considerable amounts of energy. Programmable logic chips are available, which can realize many simple, still time-consuming operations in a parallel or a pipelined manner. The paper discusses particular features of the pipelined architecture and presents selected techniques of implementing early image processing procedures in hardware.
@article{bwmeta1.element.bwnjournal-article-amcv18i1p105bwm,
author = {Marek Wnuk},
title = {Remarks on hardware implementation of image processing algorithms},
journal = {International Journal of Applied Mathematics and Computer Science},
volume = {18},
year = {2008},
pages = {105-110},
language = {en},
url = {http://dml.mathdoc.fr/item/bwmeta1.element.bwnjournal-article-amcv18i1p105bwm}
}
Marek Wnuk. Remarks on hardware implementation of image processing algorithms. International Journal of Applied Mathematics and Computer Science, Tome 18 (2008) pp. 105-110. http://gdmltest.u-ga.fr/item/bwmeta1.element.bwnjournal-article-amcv18i1p105bwm/
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